Descrizione:
Experteer Overview In this role you will develop high‑speed datapath architectures and DDR interfaces for NAND Flash memory at Micron Italy. You’ll translate system requirements into transistor‑level designs and verify timing, power, and signal integrity across blocks and subsystems. You will collaborate with cross‑functional teams to ensure manufacturability and integration readiness, while advancing automation and AI‑assisted design techniques. This position offers a chance to influence next‑generation NAND products and silicon validation at scale. Retribuzione / Benefits Design and optimize high-speed datapath and interface circuits ensuring timing closure at block/sub-system level Translate system and interface requirements into circuit architectures and transistor‑level implementations balancing performance, power, and area Perform functional, timing, and signal integrity verification using advanced simulation methodologies (PVT and corner analysis) Collaborate with multi‑functional teams to ensure floorplan integration, manufacturability, and alignment with product specifications Develop and apply automation solutions (e.g., scripting, AI‑assisted methodologies) and support silicon validation, debug, and documentation Responsabilità M. S. or Ph. D. in Electrical Engineering, Electronics, or a related field Solid understanding of high-speed digital, analog, and mixed‑signal CMOS circuit design Solid understanding of timing, signal integrity, noise, variability, and deep‑submicron device effects Hands‑on experience with industry‑standard simulation tools (e.g., SPICE, mixed‑signal, RTL/Verilog‑based flows) Strong problem‑solving and communication skills, with ability to work in dynamic, multi‑functional environments #J-18808-Ljbffr