Descrizione:
In this role you will contribute to functional verification of advanced mixed-signal ASICs, collaborating with analog, digital, and system teams to build and validate behavioral models and System Verilog real-number models. You will tailor verification environments, run simulations, and analyze results to ensure high-quality outputs for PMICs, wireless charging, and other complex ICs. You’ll help evolve verification methodologies in an R&D setting and document assumptions and conclusions clearly. This is a chance to shape the verification of next-generation mixed-signal products within a global, innovation-driven organization. Prepare and configure mixed-signal simulation environments based on technical docs Execute simulations and analyze results with rigor Validate outcomes with analog and digital design teams Produce clear technical documentation of results, assumptions, and conclusions Contribute to evolving verification methodologies and flows in R&D environment Master's degree in Electrical, Electronic, or Computer Engineering Strong understanding of architecture and behavior of complex electronic systems Solid programming skills and analytical mindset Strong collaboration and proactive attitude Experience with System Verilog real-number modeling (highly valued) Familiarity with mixed-signal simulation platforms such as Mentor Questa/ADMS, Cadence Xcelium/AMS, Synopsys VCS/AMS Knowledge of VHDL, Verilog, Verilog-AMS, or System Verilog (plus) In this role you will contribute to functional verification of advanced mixed-signal ASICs, collaborating with analog, digital, and system t… Leading careers For members only Take your next career step 1 M+ top positions worldwide with salary benchmarks Be discreetly found and contacted by headhunters Exclusively for senior-level professionals and executives #J-18808-Ljbffr