Junior Digital IC Design Engineer: RTL & Verification

NXP is building new teams in Catania to create high impact MCUs and analog/digital design. We seek an outstanding lead for our Analog Layout team, collaborating with analog, mixed-signal and software groups to deliver world-class MCU products at a fast pace.

The role focuses on RTL design, verification, and design-for-testability for complex SOCs, with emphasis on high performance and quality in a fast-paced environment. Based in Catania, you will contribute to cutting-edge IC development.

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