Lead Digital IC Design Engineer – SoC & Edge AI

NXP in Italy is seeking a senior lead for the Analog Layout team to drive digital IC design across SOCs and collaborate with analog, mixed-signal and software groups. The role emphasizes RTL design, verification, and robust design methodologies.

Ideal candidates have 10+ years in digital IC design, strong Verilog/SystemVerilog skills, and experience with industry-standard EDA tools. The position is based in Catania with opportunities to influence global projects.

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