Principal Analog Design and Verification Engineer (f/m/div)

Experteer Overview

In this Principal role, you will drive analog-centric verification of high-speed SerDes building blocks within Infineon’s R&D team. You will shape robust designs by leading top-level and mixed-signal verification across critical scenarios like start-up, power-down, and IR drop. This position offers the chance to impact next‑gen SerDes technology while collaborating with cross-functional teams in a mission to enable green, secure IoT solutions. Benefits

Perform analog-centric verification of high-speed SerDes building blocks (drivers, de-/serializers, CTLE, VGA, slicers, phase interpolators) Conduct high-sigma verification to ensure robustness and reliability of SerDes building blocks Lead analog-centric top-level verification of SerDes systems across start-up, power-down, and IR drop scenarios Execute Analog-Mixed Signal Verification for Clock-and-Data Recovery, CTLE, FFE/DFE, and Sampler Offset Compensation Responsibilities

10+ years in high-speed analog-centric mixed-signal verification Strong expertise in SerDes concepts (CDR, CTLE, FFE/DFE, sampler offset compensation) In-depth knowledge of SerDes building blocks (drivers, de-/serializers, CTLE, VGA, slicers, phase interpolators) Proven experience with analog and analog/mixed-signal simulation tools Fluency in English (mandatory)

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