Senior Digital Verification engineer

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Role

We are looking for a Digital Verification Engineer – SoC to join our MDRF-RFOC-DVCC Digital Verification team in Naples, dedicated to the digital verification of complex SoC/IP for automotive / industrial applications.

The selected candidate will work on SystemVerilog UVM testbenches, firmware / drivers in C, and Python scripts for automation, contributing to the entire verification cycle: from strategy definition to environment creation, up to coverage analysis and debug.

Within the team we also use AI-assisted tools and methodologies to accelerate development, debug, and results analysis, and we expect the candidate to be curious and interested in leveraging these technologies in day-to-day activities.

Main Responsibilities

• Define, in collaboration with architects and designers, the verification strategy at IP and/or SoC level.
• Develop and maintain UVM testbenches in SystemVerilog (environment, agent, sequencer, driver, monitor, scoreboard).
• Write and integrate C tests for subsystem and SoC verification in simulation and/or emulation environments.
• Develop Python scripts (and, when needed, bash/Tcl/Perl) for: regression automation, post‑processing of results, coverage analysis and report generation.
• Perform functional debug of failing test cases, interacting with the design (RTL) team and system architects.
• Run and debug gate‑level simulations with SDF back‑annotation, analyzing timing‑related issues and collaborating with design and implementation teams to identify and resolve problems.
• Analyze and manage functional coverage and code coverage, proposing new tests or testbench improvements to meet quality targets.
• Use AI‑assisted tools and workflows for: generation and review of testbench code and scripts, log analysis, debug acceleration.
• Contribute to the continuous improvement of verification flows (methodologies, common libraries, guidelines, best practices).
• Produce clear and structured documentation for: verification specifications, testbench architecture, test plans, key results.

Technical Requirements Mandatory (must‑have)

• Degree in Electronic Engineering, Computer Engineering/Science, Physics with an electronics focus, or related disciplines.
• Solid knowledge of digital verification of integrated circuits (RTL concepts, testbench, stimuli, checkers, coverage).
• Hands‑on experience with SystemVerilog and UVM methodology: development of UVM components (sequencer, driver, monitor, scoreboard), environment configuration, sequence and virtual sequence management.
• Good command of the C language for verification‑oriented test/firmware driver development.
• Experience with Python for scripting and automation.
• Good knowledge and practical use of the Unix/Linux environment (shell, file system, batch jobs, compilation, basic scripting).
• Familiarity with major digital simulators (e.g. Cadence Xcelium, Synopsys VCS, Siemens Questa).
• Basic knowledge of version control flows (Git, SVN, DesignSync).
• Good command of written and spoken English.
• 5‑8 years of experience in the role.

Desirable (nice‑to‑have)

• Experience with SoC/IP verification (AMBA/AXI/APB/AHB buses, memory interfaces, peripherals, interrupt controllers, DMA, etc.).
• Basic knowledge of machine learning / AI and use of AI tools for: code generation, log analysis, test and scenario creation.
• Knowledge of formal verification techniques (e.g. property checking, assertion‑based verification) and familiarity with formal tools.
• Experience in ISO 26262 environments.
• Knowledge of other scripting languages (bash, Tcl, Perl) and related EDA tools (lint, CDC, STA) is a plus.

Personal Skills

• Analytical mindset and strong problem‑solving attitude.
• Attention to detail and strong product quality orientation.
• Ability to work in cross‑functional teams (design, architecture, emulation, firmware).
• Proactivity in proposing flow improvements and automation.
• Willingness to learn new technologies, particularly AI tools and methodologies applied to engineering.
• Good communication and technical documentation skills.

ST è orgogliosa di essere una delle 17 aziende certificate come Top Employer Globale 2025 e la prima e unica azienda di semiconduttori a raggiungere questa distinzione. ST è stata riconosciuta in questa classifica grazie al suo approccio di miglioramento continuo e si distingue particolarmente nelle aree di etica e integrità, scopo e valori, organizzazione e cambiamento, strategia aziendale e performance.

In ST, ci impegniamo a promuovere un ambiente di lavoro diversificato e inclusivo, e abbiamo tolleranza zero per la discriminazione. Miriamo a reclutare e mantenere una forza lavoro diversificata che rifletta le società intorno a noi. Ci sforziamo per l’equità nello sviluppo della carriera, nelle opportunità di carriera e nella remunerazione equa. Incoraggiamo i candidati che potrebbero non soddisfare tutti i requisiti a presentare domanda, poiché apprezziamo le prospettive diverse e offriamo opportunità di crescita e apprendimento. La diversità, l’equità e l’inclusione (DEI) sono intrecciate nella nostra cultura aziendale. La nostra visione DEI è: "In ST, puoi essere la versione autentica di te stesso".

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