Senior Digital Verification engineer
- Pubblicato il 29/04/2026
- Casalnuovo di napoli (NA)
- Da definire
Descrizione:
Lo sviluppo di tecnologie richiede più del solo talento: siamo infatti alla ricerca di persone straordinarie che comprendano la collaborazione e il rispetto. Persone con passione e il desiderio di rompere lo status quo, guidare l’innovazione e sbloccare il proprio potenziale. Intraprendi un viaggio con noi, dove puoi innovare per un futuro che vogliamo rendere più intelligente e più verde, in modo responsabile e sostenibile. La nostra tecnologia inizia con te.
Role
We are looking for a Digital Verification Engineer – SoC to join our MDRF-RFOC-DVCC Digital Verification team in Naples, dedicated to the digital verification of complex SoC/IP for automotive / industrial applications.
The selected candidate will work on SystemVerilog UVM testbenches, firmware / drivers in C, and Python scripts for automation, contributing to the entire verification cycle: from strategy definition to environment creation, up to coverage analysis and debug.
Within the team we also use AI-assisted tools and methodologies to accelerate development, debug, and results analysis, and we expect the candidate to be curious and interested in leveraging these technologies in day-to-day activities.
Main Responsibilities
Define, in collaboration with architects and designers, the verification strategy at IP and/or SoC level.
Develop and maintain UVM testbenches in SystemVerilog (environment, agent, sequencer, driver, monitor, scoreboard).
Write and integrate C tests for subsystem and SoC verification in simulation and/or emulation environments.
Develop Python scripts (and, when needed, bash/Tcl/Perl) for: regression automation, post‑processing of results, coverage analysis and report generation.
Perform functional debug of failing test cases, interacting with the design (RTL) team and system architects.
Run and debug gate‑level simulations with SDF back‑annotation, analyzing timing‑related issues and collaborating with design and implementation teams to identify and resolve problems.
Analyze and manage functional coverage and code coverage, proposing new tests or testbench improvements to meet quality targets.
Use AI‑assisted tools and workflows for: generation and review of testbench code and scripts, log analysis, debug acceleration.
Contribute to the continuous improvement of verification flows (methodologies, common libraries, guidelines, best practices).
Produce clear and structured documentation for: verification specifications, testbench architecture, test plans, key results.
Technical Requirements
Mandatory (must‑have)
Degree in Electronic Engineering, Computer Engineering/Science, Physics with an electronics focus, or related disciplines.
Solid knowledge of digital verification of integrated circuits (RTL concepts, testbench, stimuli, checkers, coverage).
Hands‑on experience with SystemVerilog and UVM methodology: development of UVM components (sequencer, driver, monitor, scoreboard), environment configuration, sequence and virtual sequence management.
Good command of the C language for verification‑oriented test/firmware driver development.
Experience with Python for scripting and automation.
Good knowledge and practical use of the Unix/Linux environment (shell, file system, batch jobs, compilation, basic scripting).
Familiarity with major digital simulators (e.g. Cadence Xcelium, Synopsys VCS, Siemens Questa).
Basic knowledge of version control flows (Git, SVN, DesignSync).
Good command of written and spoken English.
5‑8 years of experience in the role.
Desirable (nice‑to‑have)
Experience with SoC/IP verification (AMBA/AXI/APB/AHB buses, memory interfaces, peripherals, interrupt controllers, DMA, etc.).
Basic knowledge of machine learning / AI and use of AI tools for: code generation, log analysis, test and scenario creation.
Knowledge of formal verification techniques (e.g. property checking, assertion‑based verification) and familiarity with formal tools.
Experience in ISO 26262 environments.
Knowledge of other scripting languages (bash, Tcl, Perl) and related EDA tools (lint, CDC, STA) is a plus.
Personal Skills
Analytical mindset and strong problem‑solving attitude.
Attention to detail and strong product quality orientation.
Ability to work in cross‑functional teams (design, architecture, emulation, firmware).
Proactivity in proposing flow improvements and automation.
Willingness to learn new technologies, particularly AI tools and methodologies applied to engineering.
Good communication and technical documentation skills.
ST è orgogliosa di essere una delle 17 aziende certificate come Top Employer Globale 2025 e la prima e unica azienda di semiconduttori a raggiungere questa distinzione. ST è stata riconosciuta in questa classifica grazie al suo approccio di miglioramento continuo e si distingue particolarmente nelle aree di etica e integrità, scopo e valori, organizzazione e cambiamento, strategia aziendale e performance.
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