Senior AMS Verification Engineer - Mixed-Signal ASICs

Experteer Italy is seeking a verification engineer to contribute to functional verification of advanced mixed-signal ASICs, collaborating with analog, digital, and system teams to build and validate behavioral models and SystemVerilog real-number models.You will tailor verification environments, run simulations, and analyze results to ensure high-quality outputs for PMICs, wireless charging, and other complex ICs. #J-18808-Ljbffr